Peripheral Driver (v02) - CAD/raw/populated

First release of PCB design: Peripheral Driver. 2 layers, 1.3x2in (33x50mm). ATmega328 (or similar) microcontroller logic at up to 20MHz clock. Eagle design files and BOM available via GitHub repository: PCB-PeripheralDriver.

Each of the 22 three-pin peripheral headers provides low-voltage power, a unique microcontroller signal pin, and a common ground. Intended to manage peripherals with high current requirements and/or noisy electrical feedback: servos, relays, high-lumen lighting, active sensors, etc. Peripherals are expected to supply their own power amplifiers with high-impedance inputs [drawing 5 to 10mW max from the signal pin].

Separate inputs for logic power (Vcc) and power supplied to outputs (Vdd). [Ground must be common.]  Optional onboard Vcc regulation and low-pass filtering [in the half millifarad range].  Vcc may be reduced below 5V (i.e. to accommodate 3.3V supplies and peripherals), if the clock rate is reduced as well.

A standardized pinout and pair of mounting holes along the top of the board provide power and UART comms to independent daughterboards, such as the PeriphDB-DiffUART differential UART comms board. The RST pin is included for Arduino bootloader support.

Improvements in v02:

• Widen driver power (Vdd/Gnd) tracks to 20mil.
• Replace screw terminal power inputs with SIP header.
• Allow separate inputs for motor power (Vdd) and regulator power (VccReg). V01 allowed for separate Vcc and Vdd inputs, but the Vcc regulator, if installed, could only source from Vdd.
• Add dedicated BEC input port, where signal pin is left floating (but Vdd/Gnd are connected).
• Decrease overall footprint.